How to Build a Three-Input Circuit Truth Table
Learn to build a three-input truth table for circuits with NOT, AND and OR gates, using intermediate columns to check every input combination and avoid errors.
For three inputs, make a truth table with eight rows: one for every possible combination of inputs. Then add a column for each gate’s output and work through the circuit in the order the signals travel.
Set up the rows
Call the inputs AAA, BBB and CCC. Each input can be 000 (false) or 111 (true), giving 23=82^3=823=8 combinations. List them systematically, from 000000000 to 111111111, so none are missed.
To build the input columns, hold AAA at 000 for four rows, then at 111 for four rows. Change BBB every two rows, and alternate CCC between 000 and 111 on every row. This pattern includes each combination exactly once and makes missing or repeated rows easier to spot.
Follow the gates
The question does not include a circuit diagram, so this example assumes that BBB first passes through a NOT gate, its result is combined with AAA by an AND gate, and that result is combined with CCC by an OR gate. Let X=A AND (NOT B)X=A\text{ AND }(\text{NOT }B)X=A AND (NOT B) and Y=X OR CY=X\text{ OR }CY=X OR C.
NOT reverses an input: 000 becomes 111, and 111 becomes 000. AND gives 111 only when both its inputs are 111. OR gives 111 when at least one of its inputs is 111. Use these rules on the inputs entering each gate, not automatically on the original input columns.
| AAA | BBB | CCC | NOT B\text{NOT }BNOT B | XXX | YYY |
|---|---|---|---|---|---|
| 000 | 000 | 000 | 111 | 000 | 000 |
| 000 | 000 | 111 | 111 | 000 | 111 |
| 000 | 111 | 000 | 000 | 000 | 000 |
| 000 | 111 | 111 | 000 | 000 | 111 |
| 111 | 000 | 000 | 111 | 111 | 111 |
| 111 | 000 | 111 | 111 | 111 | 111 |
| 111 | 111 | 000 | 000 | 000 | 000 |
| 111 | 111 | 111 | 000 | 000 | 111 |
An intermediate column records a result that feeds another gate. For example, when A=1A=1A=1, B=0B=0B=0 and C=0C=0C=0, NOT changes BBB to 111. The AND gate gives X=1X=1X=1, so the OR gate gives Y=1Y=1Y=1.
As a check, every row with C=1C=1C=1 must have Y=1Y=1Y=1 in this example, because CCC enters the final OR gate. The common mistake is to apply a gate to the original input instead of the output of the previous gate. Follow the wires on your diagram and complete intermediate columns before the final output. A different circuit will have different intermediate columns and results.
