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Systems architecture

Systems architecture

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Question 14

Five components/buses of a CPU architecture are listed below:

  • A. Current Instruction Register (CIR)
  • B. Memory Data Register (MDR)
  • C. Address Bus
  • D. Control Bus
  • E. Memory Address Register (MAR)

For each row in Table 1, choose the letter (A, B, C, D, or E) that best matches the description. Letters should not be used more than once.

Table 1

DescriptionLetter (A-E)
Holds the instruction currently being decoded and executed.
Transports physical memory addresses from the processor to system memory and input/output controllers.
Temporarily holds any data or instruction fetched from memory, or data waiting to be written to memory.
[3]
Markscheme

Systems architecture Questions

  1. GCSE
  2. /Computer Science
  3. /Systems architecture

37 exam-style questions on AQA GCSE Computer Science Systems architecture. Each one has a worked solution and a mark scheme showing where the marks go.

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