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Question 4

Describe the role of the control unit, the address bus, the data bus, and the control bus during the Fetch stage of the Fetch-Decode-Execute cycle, as a processor retrieves an instruction from main memory (RAM).

[4]
Markscheme

Hardware Questions

  1. GCSE
  2. /Computer Science
  3. /Hardware

76 exam-style questions on Edexcel GCSE Computer Science Hardware, covering Von Neumann architecture and FDE cycle, Secondary storage devices, and Embedded systems. Each one has a worked solution and a mark scheme showing where the marks go.

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