An autonomous deep-sea research glider uses a low-power microcontroller to manage its buoyancy control system.
Describe how the Program Counter (PC), Memory Address Register (MAR), and Memory Data Register (MDR) operate and interact specifically during the fetch stage of the Fetch-Decode-Execute cycle.
12 exam-style questions on OCR GCSE Computer Science Architecture of the CPU. Each one has a worked solution and a mark scheme showing where the marks go.