A 4-bit binary counter has a clock input pin CK, an active-high reset pin R, and output pins A, B, C, and D, where A is the least significant bit. State the type of 2-input logic gate and the counter outputs to which its inputs must be connected so that the circuit functions as a modulo-6 counter.
Table 1 shows how the values of the controller inputs CBA control the logic level applied to each of the segments a to g during the counting cycle of a modulo-6 counter.
Table 1
| Logic inputs | Logic outputs | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| C | B | A | a | b | c | d | e | f | g |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
One of the logic outputs a to g is controlled by a single NOT gate connected to one of the inputs A, B, or C. State the input that is used and the segment that this NOT gate controls.
XXX represents one of the logic outputs. The Boolean expression for this output is:
X=(A⋅B‾)+C X = (A \cdot \overline{B}) + C X=(A⋅B)+CIdentify which of the logic outputs a to g is controlled by this function.
YYY represents another of the logic outputs. The Boolean expression for this output is:
Y=(A‾⋅B)‾⋅(B‾+C‾) Y = \overline{(\overline{A} \cdot B)} \cdot (\overline{B} + \overline{C}) Y=(A⋅B)⋅(B+C)Explain the configuration of logic gates (NOT, AND, NAND, OR) needed to construct a circuit representing this expression, tracing the signal path from inputs A, B, and C to output YYY.
5 exam-style questions on AQA A Level Physics Digital signal processing (A-level only), covering Combinational logic (A-level only), Sequential logic (A-level only), and Astables (A-level only). Each one has a worked solution and a mark scheme showing where the marks go.